Signal Integrity and System Design with Special Emphasis on Getting to 32Gbps
NEW course by Lee Ritchey combines the 3-day SI Course with the 1-day Very High Speed course. This is the premier course for signal integrity engineers and designers who are designing systems that contain very high speed differential signaling data links such as PCIE, SATA, USB and all forms of Ethernet connections.
This course is important to engineers and designers who are being asked to design PCBs and systems that have data channels operating above 1 Gb/S. It describes how to handle the multiple (sometimes as many as 29) high current, low voltage supplies present in these new products. It also covers in detail how to design the transmission lines required by these signals in such a way that they have the bandwidth and low skew required for stable operation.
This course is also of value to new engineers and designers who are looking for a comprehensive introduction to high speed system design. Get all the myths debunked and understand where to look for the real issues. Understand how power supply bypassing is fundamental to modern high-speed design – and how you do it efficiently in your own designs.
The first 3 days are theory only, whereas the optional day 4 is all hands-on simulations. Use the 4th day to see how to simulate all the important SI issues in real world designs. Rolf Ostergaard runs day 4. Read more about the subjects covered.
If you take only one course in signal integrity – this should be it. Highly recommended by many engineers and layout designers. Quotes like “One of the best courses I have ever taken” and “Takes all the BS out of the subject” are not only real but also actually common. It’s all pretty well summed up by the participants:
Who should attend?
- Design Engineers
- System Architects
- EMC Specialists
- Signal Integrity Engineers
- PCB Layout Professionals
- Applications Engineers
- IC Designers
- IC Packaging Engineers
- Test Engineers
Electronic designs of all kinds are operating with increasingly faster clock rates and rise times. At the same time, the pressure to complete designs in fewer design cycles is putting pressure on design teams to deliver designs to manufacturing that are”right the first time”. In order to account for the normal variations in component edge rates, propagation delay variations, amplifier gains, logic levels and variations in the PCB fabrication process, it is necessary to invoke the use of design tools and methods that allow “pre-route” analysis to insure the final product is designed correctly.
What’s new this time?
This new version of the three day course combines all of the features of the previous three day course on Signal Integrity and System Design with the very high speed one day course on getting to 32 Gbps. Also an optional day 4 has been added to cover essential simulation techniques to apply the theory hands-on with actual circuits.
Practical and Comprehensive
This highly practical course is designed to take the student through the entire process involved in designing and fabricating high speed PCBs. It begins with the fundamentals of electromagnetic fields and the behavior of transmission lines that are the basis for all high-speed signaling. From there, it examines all of the aspects of high-speed design leading to the development of a robust set of PCB design rules that accounts for power subsystem design, routing rules and design of PCB stack-ups as well as the fabrication rules needed to balance performance against cost and manufacturability.
Real-life Design Examples
The materials and examples used in this course are drawn from actual designs of high speed systems in current manufacture. These examples range from video games to terabit routers and cover the complete range of designs. The design process presented is based on many years of completing designs that are “right the first time”. Students are shown many ways to improve their design process so that designs meet this objective. Reliable methods for controlling and containing EMI will also be thoroughly covered.
Very High Speed
This course places special emphasis on very high speed differential signaling protocols such as XAUI, Hypertransport, PCI Express, Infiniband, SATA, SSCSI and others that are becoming the backbone of modern computing. Actual circuits are built and tested and then modeled to correlate modeling techniques. The topic of how to design power delivery systems capable of supporting these protocols is also addressed.
Get Your Problems Solved
Part of day 3 provides the participants with a unique opportunity to get specific input and solutions to pre-submitted design challenges. We encourage the participants to describe one or two specific design challenges, and submit it for Lee Ritchey to specifically address during this session.
Any engineering professional who works with high speed design will understand the materials presented. No advanced mathematics are required. Also PCB designers will get valuable information from the course that will enable them to understand why new layout requirements have been added to their tasks.
Signal Integrity Fundamentals
- Fundamentals of transmission line behavior
- Types of transmission lines
- Calculating impedance
- Effects of right angle bends, vias and cuts in planes
- Differential signaling
- Cross talk
- Power delivery system design
- Design rule creation
- PCB design process
- Designing basic PCB stackups
- Managing EMI
- Developing routing rules
- Simulation methods and limitations
- Testing fabricated PCBs
- Getting to 32 Gb/S
- PCB fabrication
- Designing pad stacks
- Blind and buried vias and build up technology
Getting to 32 Gbps
- How differential pairs operate
- Power delivery issues with differential pairs
- Managing cross talk in differential pairs
- Signal degradation sources- a real data path will be modeled and signal speed increased
- Bandwidth requirements for differential pairs
- How skew affects differential pairs
- How laminate choices affect skew
- Managing skew in differential pairs
- How laminate choice affects loss
- How choice of copper finish affects loss
- How processing at fabricators affects loss
- Routing differential pairs for optimum performance
- Choosing connectors for high speed differential pairs
- Connector pin out to minimize unwanted cross talk
- How vias can affect signal quality
- When can vias be ignored?
- How to prevent vias from degrading signal quality
- Choosing materials that enable good signal quality without over specifying
- Is a low DK (dielectric constant) material necessary for high speed signaling?
- Handling high speed differential signals on twisted pairs
- Handling high speed differential pairs on flexible circuits
- Characteristics of new laminates developed for high speed signaling
- Adaptive transceivers
- Equalizing techniques
- Simulation of high speed data paths
- Documentation required in order to insure boards containing high speed differential pairs are properly fabricated
Lee Ritchey is considered to be one of the industry´s premier authorities on high speed PCB and system design. He has participated in the design of more than 1000 high speed PCBs ranging from PC mother boards and elevator controllers to the backplanes used in terabit routers. He is currently involved in the design of several super computer class products as well as video games and servers of all kinds.
He has taught this course and others in our curriculum to more than 10,000 engineers and designers throughout the world, including to all major suppliers of equipment to the Internet and the Cloud.
The course draws substantially from this real-time experience with state of the art components, fabricators and materials. It also draws heavily on the design of backplanes and daughter boards containing thousands of 2.4, 4.8 and 9.6 GB/S signal paths as well as some special cases if data paths in excess of 28 Gb/S.
Author of the book series: Right the First Time
This is what you get, when you take this course:
- Three full days of expert training 9:00 to 16:00 interchanging between theory, examples and demonstrations with relevant design tools
- One e-copy of the volume 1 book
- A regular printed volume 2 book (value $95)
- Binder with all course slides.
- A large collection articles for further reading (download archive provided at the course)
- Coffee/the/water + fruit, pastries and a full lunch
- Signed course certificate
Where it isRegus Fairway House
Arne Jacobsens Allé 7
2300 Copenhagen S.
Free parking available. WiFi. Easy access through train & metro station – Ørestad. Find it on Google Maps.
In case you’d prefer a hotel in the city – you can take the train from Ørestad st. to Copenhagen Central Station (10 min.) or the metro from Ørestad st. to Nørreport St (12 min, 7 stops).
Regarding public transportation, we would recommend buying a Flex Card (7 days) or Copenhagen Card. Check here for more information.
We are looking forward to meet you in Copenhagen 2016. Please sign up early to secure your seat.
Copenhagen SI Week 2016
Lee Ritchey: Signal Integrity day 1 (9:00-16:00)
Nordcad: Latest Cadence Tools Demo (16:00-??)
||Lee Ritchey: Signal Integrity day 2 (9:00-16:00)|
||Lee Ritchey: Signal Integrity day 3 (9:00-16:00)|
||Simulation: Signal Integrity day 4 (9:00-16:00)|
||Lee Ritchey: Stackup Design day 5 (9:00-16:00)|
Sign up before Mar 1st to get the Early Bird discount.
|Lee Ritchey: VHS Signal Integrity (Mon-Wed)
|Lee Ritchey: VHS Signal Integrity PLUS (Mon-Thu)
|Simulation: Signal Integrity (Thursday)
|Lee Ritchey: Stackup Design (Friday)
|Full SI Week (Mon-Fri)
The sponsors help make this possible by supporting the course and the massive marketing effort required to get so many busy engineers from all over Europe assembled in one place. Without the sponsors, this course would not be feasible. We do not receive any kick-back from sponsors.