Getting to 32 Gbps
This one day course is intended to cover all of the technical issues involved in the design of very high speed differential pair signal paths. This is a thorough treatment of all of the topics that must be considered in order to be successful as the speeds of differential pair signal paths continue to increase.
28Gbps signaling is already being successfully shipped in high performance servers, routers and switches. When data rates exceed 5 Gbps there are a number of areas that need to be managed that were not significant issues at lower data rates. Among these are the type of glass weave used in laminates, the surface finish on the copper used for signal layers and the loss characteristics of the laminate itself. Effects of vias and other drilled holes can also have a significant effect on signal quality if not properly managed.
This course will draw upon more than 30 test PCBs built to determine the properties of new laminate systems as well as to measure the effects of vias, plane crossings and other features that might affect high speed signals.
It is useful to have completed a two or three day signal integrity course like Lee Ritchey: Signal Integrity or Signal Integrity with Hands-On Simulation, but not necessary. Good engineering training is also valuable, and PCB designers will also get valuable information from the course that will enable them to understand why new layout requirements have been added to their tasks.
The following major topics are covered.
- How differential pairs operate
- Power delivery issues with differential pairs
- Managing cross talk in differential pairs
- Signal degradation sources- a real data path will be modeled and signal speed increased
- Bandwidth requirements for differential pairs
- How skew affects differential pairs
- Managing skew in differential pairs
- Routing differential pairs for optimum performance
Laminates and Board Fabrication
- How laminate choices affect skew
- How laminate choice affects loss
- How choice of copper finish affects loss
- How processing at fabricators affects loss
- Choosing materials that enable good signal quality without over specifying
- Is a low DK (dielectric constant) material necessary for high speed signaling?
- Characteristics of new laminates developed for high speed signaling
- Documentation required in order to ensure boards containing high speed differential pairs are properly fabricated
Cables and Connectors
- Connector pin out to minimize unwanted cross talk
- Handling high speed differential signals on twisted pairs
- Handling high speed differential pairs on flexible circuits
- How vias can affect signal quality
- When can vias be ignored?
- How to prevent vias from degrading signal quality
- Adaptive transceivers
- Equalizing techniques
Lee has been providing signal integrity engineering services to several network equipment manufacturers as well as a supercomputer project with 110,000 processors and data links running at 5.2 GB/S.
He has taught high speed design courses since 1992.
Author of the book series: Right the First Time
This is what you get, when you take this course:
- A full day of expert training 9:00 to 16:00 interchanging between theory, examples and demonstrations with relevant design tools
- Binder with all course slides.
- A large collection articles for further reading (download archive provided at the course)
- Coffee/the/water + fruit, pastries and a full lunch
- Signed course certificate
Where it isRegus Fairway House
Arne Jacobsens Allé 7
2300 Copenhagen S.
Free parking available. WiFi. Easy access through train & metro station – Ørestad. Find it on Google Maps.
In case you’d prefer a hotel in the city – you can take the train from Ørestad st. to Copenhagen Central Station (10 min.) or the metro from Ørestad st. to Nørreport St (12 min, 7 stops).
Regarding public transportation, we would recommend buying a Flex Card (7 days) or Copenhagen Card. Check here for more information.
We are looking forward to meet you in Copenhagen 2016. Please sign up early to secure your seat.
Copenhagen SI Week 2016
Lee Ritchey: Signal Integrity day 1 (9:00-16:00)
Nordcad: Newest Cadence SI Tools Demo (16:00-??)
||Lee Ritchey: Signal Integrity day 2 (9:00-16:00)|
||Lee Ritchey: Signal Integrity day 3 (9:00-16:00)|
||Simulation: Signal Integrity day 4 (9:00-16:00)|
||Lee Ritchey: Stackup Design day 5 (9:00-16:00)|
Sign up before Feb 30 to get the Early Bird discount.
|Lee Ritchey: Signal Integrity (Mon-Wed)
|Lee Ritchey: Signal Integrity PLUS (Mon-Thu)
|Simulation: Signal Integrity (Thursday)
|Lee Ritchey: Very High Speed (Friday)
|Full SI Week (Mon-Fri)
The sponsors help make this possible by supporting the course and the massive marketing effort required to get so many busy engineers from all over Europe assembled in one place. Without the sponsors, this course would not be feasible. We do not receive any kick-back from sponsors.