Available both as public class and as private class across the world – please email us to suggest a course date and location that works well for you.
Next public class:
Munich, DE, Oct 24, 2017
The courses are expanded 3-day courses with more stuff on PCB fabrication, extra labs and more on designing boards to handle 5-30 GBps signaling.
Learn to estimate, calculate and simulate signal integrity problems before they occur. Understand how predict and quantify reflections, crosstalk, ground bounce, supply ripple and loss. These are the basic signal-integrity issues in any modern digital design. Keep the total impact of those within the noise margin, and your system will work as predicted.
The goal of this course is to reduce the number of board revisions of your designs. Several of the companies that have participated in previous courses have achieved this.
The material is presented with a practical approach interchanging between theory and hands-on exercises. The tools used in the course are from Cadence or Mentor Graphics, but used as just that: tools – so it’s not a course on how to operate the tools, but in understanding the results.
Examples used through the material includes design of DDR memory systems, clocks, fast LVDS differential buses, PCIe, PCI and similar buses.
The course runs over 3 days from 9:00 am to 16:00 (4:00 pm)
All participants gets a full binder of course material.
There is no requirement for any specific textbook, but if you want further reading, the two “Right The First Time” books (Volume 1 and Volume 2) by Lee Ritchey are very much suitable.
These books are recommended for further reading and reference. The books are not included in price. Get Volume 1 as a pdf for free simply by signing up for email updates right here on the site. Volume 2 can be purchased at the authors website: www.speedingedge.com (or send an email and I will see what I can do).
The following topics are covered in the course:
- Transmission Lines (how to calculate using 2D field solver, material constants, geometries, verifying)
- Reflections (under / overshoot, termination methods, net topologies, connectors, stubs)
- Crosstalk (understanding, terminology, how to calculate, simulation setups, measures to take)
- Differential signaling (LVDS, PCIe, high speed serial buses, routing)
- Power sub-system design (decoupling, capacitor types, power planes, measurements)
- Ground bounce (estimating, simulating, understanding, package design impact)
- Noise Margin budget (losses in transmission lines, termination noise, process)
- Layout routing rule creation and usage
- PCB stack-up design and useful embedded PCB test features
The course assumes knowledge of digital design at the PCB level. No advanced math is required.
Practical exercises are done using the latest simulation tools from Cadence or Mentor Graphics.
Note: This course focuses on theory and understanding. It is not a tool-specific training. The exercises are primarily designed to give participants a feel for the mechanisms as they are in real circuits.
Rolf V. Ostergaard, M.Sc.EE. from EE-Training is the instructor. Rolf has worked with signal integrity in many different projects since working for 3Com in 1998 as a colleague to Lee Ritchey in Silicon Valley. While building a consulting business focused on advanced electronics and embedded software in Denmark, Rolf has been helping many companies with signal integrity and power integrity both as design, simulations, coaching, measurements and troubleshooting. He started conducting training in SI around 2004 and has trained hundreds of engineers, which lead to founding EE-Training to further expand this.Indicate Interest